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The "Information zone" consists of articles produced as background tutorials on subjects of interest to those designing new products. As different CPUs have became available this has lead to new development techniques and in particular to new ways of communicating between nodes.
This tutorial is one of a series designed to summarise the main features of a microprocessor CPU family so that engineers familiar with the general principles of embedded microprocessor development can rapidly get to know the 8085 family.
The 8085 was one of the first (1978) of the 8 bit Microprocessors where all the processing elements for a computer were contained on a single chip. It was used to spearhead the home desktop computer revolution running the CP/M operating system and WordStar, one of the original word processor applications, was developed for it.
Based on the 8080, the 8085's instruction set was almost identical but the major changes were that the electronics required to design an 8085 system were much simpler (one rather than 3 power supplies and internal clock and bus logic).
The team that designed the Intel 8080 had by then moved to Zilog where they went on to develop the Z80.
The Z80's instruction set is a strict superset of the 8085's and compatibility is sufficiently good that code in a ROM from an 8085 will directly operate on a Z80 machine, although the electronic details of how devices interface to the CPU are different.
The 8085 and Z80 are typical of that generation of 8 bit Microprocessors which were able to put all the processing unit onto one chip but still requiring surrounding supporting chips to create a complete system. By contrast the modern Microcontrollers such as the 8051 include these components, such as interrupt handlers UARTs and timers and with on chip ROM/Flash and RAM can act as a single chip system.
The 8085 family can address 64K bytes of memory which is used for both code and data space.
Memory is accessed via 20 pins. 8 address high pins and 8 pins that are used both for the 8 address low signals during the address setup phase and for the 8 data signals during the data transfer phase. 4 pins are used for control.
A READY input line allows memory or I/O access to slow down the data transfer. This allows slow memory or I/O hardware to be easily interfaced. And a HOLD line allows peripheral hardware to take over the memory bus allowing DMA transfers to be implemented.
The lower 8 of the16 address bus memory along with I/O and READ or WRITE control signals allow 512 I/O addresses to be referenced using the IN and OUT instructions. Two lines SID and SOD can be used to generate serial IN and OUT signals under direct software control (so called "bit banging" or "software UART" as the software has to be timed to turn each bit of the serial stream on and off).
You may also interface your I/O devices to the address bus by memory mapping them into addresses on the multiplexed address and data bus.
The 8085 has an 8 bit Accumulator and six 8 bit secondary Registers (B, C, D, E, H, L) that can also be grouped as three 16 bit Register pairs. One of these Register pairs (HL) is used by some memory reference instructions as a pointer.
Memory addressing is simple. A 16 bit address is either built into the instruction, or taken from the HL Register.
The instruction set is simple and uniform making it easy to learn. The OPCODES are all 8 bits long and these may contain Register fields and the OPCODE may be followed by an 8 or 16 bit immediate value or a 16 bit address.
<-------------------------- Byte --------------------->
OPCODE X X X
<------------------------- Byte ---------------------> <------------ 8 or 16 ----------->
The contents of all Registers including the Accumulator and the memory location pointed to by (HL) may be incremented, decremented or loaded with an immediate value. Similarly all combinations of Register, Accumulator and Memory pointed to by (HL) may be moved to another Register or the Accumulator or Memory pointed to by (HL). The following arithmetic operations may take place between any Register, Memory pointed to by (HL) or an immediate value as source and the Accumulator as destination - ADD, SUB, AND, OR, XOR and Compare.
The Register pairs can be incremented or decrement as a 16 bit value, or a 16 bit immediate value may be added to the HL pair which make 64K address manipulation easy.
There are Rotate operations via the Carry flag but no specific bit handling instructions.
There is a 16 bit stack pointer.
Jumps, Calls and returns all have conditional versions (ie Jump on carry set) and all jumps are to absolute 16 bit addresses. The Register pairs may be pushed to or popped from the stack.
The basic 8085 provides four interrupt lines which are hardware vectored to dedicated locations. If this is not adequate then the following mechanism can be used.... An interrupt signal is acknowledged by the 8085 and external interrupting logic can then send an instruction op code (usually RESET or CALL plus a vector address - but to implement a fast event counter it could be to INC a dedicated Register ).
Although now (2007) no one is likely to start a design with the 8085 it is instructive to give figures for power consumption and speed of execution that can be compared with those given in other tutorials in this series.
The N-Channel 8085A consumes 170mA although it requires at least two other chips (8156 & 8355) to make a complete system that then consumes ~530mA
The fastest instructions such as Reg to Reg MOV take 4 clock periods, instructions that address memory such as Memory INC , JUMP to address or PUSH take 10 clock periods and the longest instructions are the CALL variants which take 18 clock periods. With a 3MHz clock the 8085A instructions therefore take from 1.3 µSec to 5.75 µSec.
The 8085 requires external chips providing clock, interrupt, timer, I/O, Code ROM and data RAM as well as a program to be operational. The major advantage of using an In-Circuit Emulator (ICE) was that its internal hardware could be used in place of any or all of these parts during the boards development making it simple to isolate the problem component. If an ICE was unavailable, then ROM emulation was commonly used to speed up program development significantly over using EEPROMs.
Intel provided an Assembler and, at a price, PL/M, PASCAL, FORTRAN, Basic and a Real Time Executive RMX-80. Assemblers and a C Compiler are still available.
To summarise - this CPU was the basis of many of the board based systems developed during the 80s. It was easy to program in Assembler and (for its time) parts costs were reasonable. However Development Systems were expensive, High Level languages were inefficient and experienced Designers and Programmers were as rare as hens teeth.
The History of the Microcomputer - Invention and Evolution for details of how the Intel 8 and 16 bit ranges of CPUs evolved.
For details of the tools available to support the 8085 visit our 8085 products support page.
If you have found this
tutorial useful you might also be interested in our tutorials on
Embedding TCP/IP, CAN and USB or on other microprocessor and microcontroller families.
If so you can find them at Embedded Tutorials
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